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Ground Port A PA Port pins can provide internal pull-up resistors selected for each bit. When pins PA0 to PA7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B PB The Port B output buffers can sink 20 mA.
As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATmega as listed on page Port C PC The Port C output buffers can sink 20 mA. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated.
The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port C also serves as Address high output when using external memory interface. Port D PD The Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the ATmega as listed on page Port E PE The Port E output buffers can sink 20 mA.
As inputs, Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Port E also serves the functions of various special features of the ATmega as listed on page A low level on this pin for more than ns will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
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